This invention relates to digital data generation test systems, particularly systems for characterizing devices under test by their ability to respond to data signals of variable content, rather than merely to periodic pulses.
Conventional data generation test systems combine in separate stages a data source, a pulse generator and a switch matrix. The data source produces a stream of user-selectable data. The pulse generator produces, in response to the data generator, a pulse having selectable characteristics. The pulse generator typically is comprised of two monostable multivibrators connected in series: the first to generate the delay characterizing the leading edge of each data pulse in the data signal, the second to generate the width of each data pulse. An example of such a pulse generator is the Hewlett-Packard HP-8131A which generator is described in the August 1990 Hewlett-Packard Journal. The switch matrix directs the data pulse produced by the pulse generator to a particular pin of the device under test.
The architecture of conventional data generation test systems has a significant number of limitations. First, conventional architecture relies in part on analog circuitry, e.g., monostable multivibrators, which requires the user to design, assemble, program, debug, characterize, and eliminate skew from the output of the data generation test system before a device can be tested. Second, conventional data generation test systems are subject to retrigger limitations. Once the data signal has made a transition from a logic level "1" to a logic level "0", monostable multivibrators used in such conventional systems require some minimum recovery time before they can retrigger a transition to a logic level "1". As a practical matter, this limits the possible duty factor to substantially less than 100%. Third, conventional data generation test systems determine the trailing edge timing of each data pulse derivatively from the delay of the rising edge and the width of the data pulse, which limits their flexibility in establishing the timing of the trailing of the data pulse. Fourth, data generation test systems using monostable multivibrators generally do not allow a user to insert a controllable one-time delay at the outset of the data signal. Fifth, such data generation test systems provide only limited options for formatting the data signal. Sixth, conventional data generation test systems generally provide only limited modes for generating data signals. Seventh, such data generation test systems generally must be calibrated manually. The user makes calibration adjustments based on external measurements, particularly of the pulse generator stage, to maintain the accuracy of data signal timing.
In addition, even where digital logic devices are used to produce the data pulse, not all of the pulse period can be employed. In the production of a data pulse of arbitrary width using digital logic devices, the conventional approach is to employ a set-reset flip-flop (an "RS flip-flop") so that a first input pulse applied to the set input of the flip-flop starts the output pulse and a second input pulse applied to the reset input of the flip-flop terminates the output pulse. The time between the first input pulse and the second input pulse determines the width of the output pulse. However, the minimum pulse width that can be produced from such a circuit is one whose width is equal to the clock pulse width, since the output of an RS flip-flop is undefined when both the set and the reset inputs are asserted. The maximum pulse width is equal to the difference between the clock pulse period and the clock pulse width, for the same reason. Where it is desirable to produce a pulse having a duty cycle of anywhere from 0 to 100% of the clock period, the conventional approach is inadequate, so a new approach is needed.
Accordingly, there is a need for an improved data generation test system for characterizing devices under test by their ability to respond to the data signals output by one or more data generation systems.